vishay siliconix dg3015 document number: 72962 s-70853-rev. c, 30-apr-07 www.vishay.com 1 low-voltage, low r on , dual dpdt analog switch features ? low voltage operation (2.7 v to 3.3 v) ? low on-resistance - r on : 0.80 ? 3 db loss at 100 mhz ? fast switching: t on = 40 ns t off = 35 ns ? micro foot ? package benefits ? reduced power consumption ? high accuracy ? reduce board space ? ttl/1.8 v logic compatible ? high bandwidth applications ? cellular phones ? speaker headset switching ? audio and video signal routing ? pcmcia cards ? battery oper ated systems description the dg3015 is a dual double-pole/double-throw monolithic cmos analog switch designed for high performance switching of analog signals. combining low power, high speed, low on-resistance and small physical size, the dg3015 is ideal for portable and battery powered applications requiring high per formance and efficient use of board space. the dg3015 is built on vishay siliconix?s low voltage ji2 process. an epitaxial layer pr events latchup. break-before- make is guaranteed. the switch conducts equally well in both directions when on, and blocks up to the power supply level when off. functional block diagram and pin configuration dg3015 micro foot 16-bump nc 2 no 2 no 1 nc 1 nc 4 no 4 no 3 nc 3 com 4 gnd v+ xxx 3015 a1 locator device marking: 3015 xxx = data/lot traceabillity code in a nc 3 nc 2 v+ com 3 1 a 234 b c d top view com 2 no 3 no 2 gnd in b no 4 no 1 nc 4 nc 1 com 4 com 1 in b in a com 3 com 2 com 1 truth table logic nc1, 2, 3 and 4 no1, 2, 3 and 4 0 on off 1offon ordering information temp range package part number - 40 to 85 c micro foot: 16 bump (4 x 4, 0.5 mm pitch, 238 m bump height) DG3015DB-T2-E1 rohs compliant
www.vishay.com 2 document number: 72962 s-70853-rev. c, 30-apr-07 vishay siliconix dg3015 notes: a. signals on nc, no, or com or in exceeding v+ will be clamped by inte rnal diodes. limit forward diode current to maximum curr ent ratings. b. refer to ipc/jedec (j-std-020b) c. all bumps welded or soldered to pc board. d. derate 9.0 mw/c above 70 c. permanent damage to the device may occur when the ?absolute maxi mum ratings? are exceeded. these stress ratings do not indicate conditions for which the device is intended to be functional. functionality is only guaranteed to the conditions specified by the parametric table within the d ocument. absolute maximum ratings t a = 25 c, unless otherwise noted parameter limit unit reference v+ to gnd - 0.3 to + 6 v in, com, nc, no a - 0.3 to (v+ + 0.3 v) current (any terminal except no, nc or com) 30 ma continuous current (no, nc or com) 150 peak current (pulsed at 1 ms, 10 % duty cycle) 250 storage temperature (d suffix) - 65 to 150 c package solder reflow conditions b ir/convection 250 power dissipation (packages) c micro foot: 16 bump (4 x 4 mm) d 719 mw specifications (v+ = 3 v) parameter symbol test conditions otherwise unless specified v+ = 3 v, 10 %,v in = 0.4 v or 2.0 v e temp a limits - 40 to 85 c unit min b typ c max b analog switch analog signal range d v no , v nc , v com full 0 v+ v on-resistance r on v+ = 2.7 v, v com = 0.2 v/1.5 v i no , i nc = 100 ma room full 0.80 1.2 1.3 r on flatness r on flatness v+ = 2.7 v, v com = 0 to v+, i no , i nc = 100 ma room 0.16 r on match r on room 0.15 switch off leakage current i no(off) i nc(off) v+ = 3.3 v, v no , v nc = 1 v/3 v, v com = 3 v/1 v room full - 2 - 20 2 20 na i com(off) room full - 2 - 20 2 20 channel-on leakage current i com(on) v+ = 3.3 v, v no , v nc = v com = 1 v/3 v room full - 2 - 20 2 20 digital control input high voltage v inh full 2 v input low voltage v inl full 0.4 input capacitance c in full 4 pf input current i inl or i inh v in = 0 or v+ full - 1 1 a dynamic characteristics tu r n - o n t i m e t on v no or v nc = 2.0 v, r l = 300 , c l = 35 pf room full 40 65 67 ns turn-off time t off room full 35 60 62 break-before-make time t d full 1 3 charge injection d q inj c l = 1 nf, v gen = 0 v, r gen = 0 room 7 pc off-isolation d oirr r l = 50 , c l = 5 pf, f = 1 mhz room - 67 db crosstalk d x ta l k room - 70 n o , n c off capacitance d c no(off) v in = 0 or v+, f = 1 mhz room 63 pf c nc(off) room 67 channel-on capacitance d c no(on) room 200 c nc(on) room 196
document number: 72962 s-70853-rev. c, 30-apr-07 www.vishay.com 3 vishay siliconix dg3015 notes: a. room = 25 c, full = as determined by the operating suffix. b. typical values are for design aid only, not guaranteed nor subject to production testing. c. the algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. d. guarantee by design, nor subjected to production test. e. v in = input voltage to perform proper function. stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indi cated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended per iods may affect device reliability. typical characteristics 25 c, unless otherwise noted specifications (v+ = 3 v) parameter symbol test conditions otherwise unless specified v+ = 3 v, 10 %,v in = 0.4 v or 2.0 v e temp a limits - 40 to 85 c unit min b typ c max b power supply power supply range v+ 2.7 3.3 v power supply current i+ v in = 0 or v+ full 1.0 a r on vs. v com and single supply voltage supply current vs. temperature 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0.0 0.5 1.0 1.5 2.0 2.5 3.0 v com - analog voltage (v) - on-resistance ( ) r on t = 25 c i s = 100 ma no switch v+ = 2.7 v v+ = 3.0 v - 60 - 40 - 20 0 20 40 60 80 100 0.1 100 temperature (c) 1 10 i+ - supply current (na) v+ = 3 v v in = 0 v r on vs. analog voltage and temperature supply current vs. input switching frequency 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0.0 0.5 1.0 1.5 2.0 2.5 3.0 v com - analog voltage (v) - on-resistance ( ) r on v+ = 3.0 v i s = 100 ma no switch 85 c 25 c - 40 c 10 10 k 100 k 10 m 100 1 k 1 m 10 ma 1 ma 100 a 10 a 1 a 10 na 100 pa input switching frequency (hz) i+ - supply current (a) v+ = 3 v 100 na 1 na
www.vishay.com 4 document number: 72962 s-70853-rev. c, 30-apr-07 vishay siliconix dg3015 typical characteristics 25 c, unless otherwise noted leakage current vs. temperature switching time vs. temperature switching threshold vs. supply voltage - 60 - 40 - 20 0 20 40 60 80 100 1 1000 temperature (c) v+ = 3 v 10 100 leakage current (pa) i no(off) , i nc(off) i com(off) i com(on) 20 25 30 35 40 45 50 55 60 - 60 - 40 - 20 0 20 40 60 80 100 / t on - switching time (s) t off temperature (c) t on , v+ = 3.0 v t off ,v+ = 3.0 v 0.0 0.5 1.0 1.5 2.0 2.5 3.0 01234567 v+ - supply voltage (v) - switching threshold (v) v t leakage vs. analog voltage insertion loss, off-isolation, crosstalk vs. frequency charge injection vs. analog voltage - 800 - 600 - 400 - 200 0 200 400 600 800 0.0 0.5 1.0 1.5 2.0 2.5 3.0 v com , v no , v nc - analog v oltage (v) leakage current (pa) v+ = 3 v i no(off) , i nc(off) i com(off) i com(on) 100 k -90 10 m 10 -70 -50 100 m 1 g 1 m frequency (hz) (db) loss, oirr, x talk -30 -10 v+ = 3 v r l = 50 loss oirr x ta l k - 200 - 150 - 100 -50 0 50 100 0.0 0.5 1.0 1.5 2.0 2.5 3.0 v com - analog voltage (v) q - charge injection (pc) v+ = 3 v
document number: 72962 s-70853-rev. c, 30-apr-07 www.vishay.com 5 vishay siliconix dg3015 test circuits figure 1. switching time switch input c l (includes fixture and stray capacitance) v+ in no or nc c l 35 pf com logic input r l 300 v out gnd v+ 50 % 0 v logic input switch output t on t off logic "1" = switch on logic input waveforms inverted for switches that have the opposite logic sense. 0 v switch output v out = v com r l r l + r on 0.9 x v out t r < 5 ns t f < 5 ns v inh v inl figure 2. break-before-make interval c l (includes fixture and stray capacitance) nc v no no v nc 0 v logic input switch output v o v nc = v no t r < 5 ns t f < 5 ns 90 % t d t d in com v+ gnd v+ c l 35 pf v o r l 300 v inl v inh figure 3. charge injection off on on in v out v out q = v out x c l c l = 1 nf r gen v out com v in = 0 - v+ in v gen gnd v+ v+ in depends on switch configuration: input polarity determined by sense of switch. + nc or no
www.vishay.com 6 document number: 72962 s-70853-rev. c, 30-apr-07 vishay siliconix dg3015 test circuits figure 4. off-isolation in gnd nc or no 0 v, 2.4 v 10 nf com off isolation = 20 log v com v no/ nc r l analyzer v+ v+ com figure 5. channel off/on capacitance nc or no f = 1 mhz in com gnd 0 v, 2.4 v meter hp4192a impedance analyzer or equivalent 10 nf v+ v+
document number: 72962 s-70853-rev. c, 30-apr-07 www.vishay.com 7 vishay siliconix dg3015 package outline micro foot: 16 bump (4 x 4, 0.5 mm pitch, 0.238 mm bump height) notes (unless other wise specified): a. bump is lead (pb)-free sn/ag/cu. b. non-solder mask defined copper landing pad. c. laser mark on silicon die back; back-lapped, no coat ing. shown is not actual marking; sample only. notes: a. use millimeters as the primary measurement. vishay siliconix maintains worldwide manufac turing capability. products ma y be manufactured at one of several qualified locatio ns. reliability data for silicon tech- nology and package reliability represent a composite of all qua lified locations. for related documents such as package/tape dra wings, part marking, and reliability data, see http://www.vishay.com/ppg?72962 . index-bump a1 note c top side (die back) xxx 3015 recommended land pattern 0.5 0.5 16 x ? 0.150 0.229 note b solder mask ? pad diameter + 0.1 bump note a 321 a b e d e a a 2 a 1 s s e silicon c d 4 b diameter e e e e dim millimeters a inches min max min max a 0.688 0.753 0.0271 0.0296 a 1 0.218 0.258 0.0086 0.0102 a 2 0.470 0.495 0.0185 0.0195 b 0.306 0.346 0.0120 0.0136 d 1.980 2.020 0.0780 0.0795 e 1.980 2.020 0.0780 0.0795 e 0.5 basic 0.0197 basic s 0.230 0.270 0.0091 0.0106
document number: 91000 www.vishay.com revision: 18-jul-08 1 disclaimer legal disclaimer notice vishay all product specifications and data are subject to change without notice. vishay intertechnology, inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, ?vishay?), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. vishay disclaims any and all li ability arising out of the use or application of any product describ ed herein or of any information provided herein to the maximum extent permit ted by law. the product specifications do not expand or otherwise modify vishay?s terms and conditions of purcha se, including but not limited to the warranty expressed therein, which apply to these products. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of vishay. the products shown herein are not designed for use in medi cal, life-saving, or life-sustaining applications unless otherwise expressly indicated. customers using or selling vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify vishay for any damages arising or resulting from such use or sale. please contact authorized vishay personnel to obtain written terms and conditions regarding products designed for such applications. product names and markings noted herein may be trademarks of their respective owners.
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